Job Responsibilities:-

• Define, architect and document the Design-for-Testability (DfT) concept for SOC’s
• Develop, implement and verify DFT measures
• Work closely with cross-function teams (design/verification, physical, and operation) to ensure all test requirements are met and DFT function is correctly implemented for effective DFT solutions
• Achieve target structural test coverage for logic, memories, serdeses and other mixed signal IPs
• Test pattern generation / verification / post silicon ATE support

Job Requirements:-

• Master's or Bachelor Degree in Electronics and Communications Engineering or equivalent 
• About 3 years of working experience in DFT field
• Good knowledge in Boundary Scan, ATPG Scan, and MBIST is a must
• Working experience in industry standard tools like TestKompress, DFT advisor, DFT Compiler
• Knowledge of design flow
• Knowledge in high level programming and script writing
• Knowledge in HDL, synthesis, static timing analysis and constraining will be an added advantage
• Some Experience in Test development and Product engineering 
• Good communication, analytical and problem-solving skills
• A team player with an open and co-operative personality

Location: Next to Bendemeer MRT

Interested candidatesmay submit detailed CV with the following info:-

• Current salary, including AWS or Variable Bonus
• Expected salary
• Availability