Job Description :

• Prototype lot & DOE/split lot execution
• In-line, ET & sort report generating for proto & DOE/split lot
• ET charts upkeep, OOC/OOS investigation & annotation, Cpk report generating & drive Cp/Cpk improvement activities
• Sort yield & FT yield monitoring, yield investigation & drive improvement activities
• In-line issue & defect issue investigation, drive improvement activities
• Engineering logistic handling: lot start/scrap, SPSR, PRF, Ydd request, postfab disposition, REL/PFA request, PR/PO, run-sheet creation, or where deems to be necessary as identified by his/her supervisor
• Track Process Integration related line-yield, scrap, lot inventory and report the performance on a regular basis. Highlight excursion and abnormality
• Maintain process and yield related specifications (ET ECN, STF, Time link ECN, Runsheet ECN, PCP, FMEA, etc.)
• Need to drive one or more projects independently.

Job Requirements :

• Diploma Electrical / Electronics / Mechanical / Mechatronics/Microelectronics /Chemical Engineering
• Min 1-3 years of relevant wafer Fab / semiconductor experience is required.
• Able to perform 12 hours rotating shift
• An excellent team player with good interpersonal skill
• Strong logical thinking capability and good analytical skill
• Highly committed with good ownership and accountability
• Passion for the semiconductor/ Manufacturing industry
• Able to adapt in a fast pace environment and work under pressure
• Proficient in MS Office Applications